From ea471ed5faa99689fb4691f32dd6530ddb951ebb Mon Sep 17 00:00:00 2001 From: Dan Gora Date: Thu, 28 Jul 2016 18:00:22 -0300 Subject: [PATCH] ID:454 - Add support for PICMG 3.1 R2.0 Link Types and Link Classes. PICMG 3.1 R2.0 introduces new a new Link Class field in the FRU Link Descriptors which is the upper 4 bits of the Link Type field. This new Link Class field specifies SERDES lanes with 10.3125Gbd signalling rate. It also introduces the new Base-KX and Base-KX4 types which are the new IEEE replacements for the PICMG 3.0 Base-BX and Base-BX4 types. This patch decodes these new types and fields and will print out proper descriptions for each one based on PICMG 3.1 R2.0 --- include/ipmitool/ipmi_fru.h | 14 ++--- lib/ipmi_fru.c | 104 +++++++++++++++++++++--------------- 2 files changed, 68 insertions(+), 50 deletions(-) diff --git a/include/ipmitool/ipmi_fru.h b/include/ipmitool/ipmi_fru.h index b371f44..65696ba 100644 --- a/include/ipmitool/ipmi_fru.h +++ b/include/ipmitool/ipmi_fru.h @@ -297,22 +297,24 @@ struct fru_picmgext_link_desc { unsigned int desig_channel:6; unsigned int desig_if:2; unsigned int desig_port:4; -#define FRU_PICMGEXT_LINK_TYPE_BASE 0x01 +#define FRU_PICMGEXT_LINK_TYPE_BASE 0x01 #define FRU_PICMGEXT_LINK_TYPE_FABRIC_ETHERNET 0x02 #define FRU_PICMGEXT_LINK_TYPE_FABRIC_INFINIBAND 0x03 -#define FRU_PICMGEXT_LINK_TYPE_FABRIC_STAR 0x04 -#define FRU_PICMGEXT_LINK_TYPE_PCIE 0x05 +#define FRU_PICMGEXT_LINK_TYPE_FABRIC_STAR 0x04 +#define FRU_PICMGEXT_LINK_TYPE_PCIE 0x05 +#define FRU_PICMGEXT_LINK_TYPE_FABRIC_ETHERNET_10GBD 0x32 unsigned int type:8; unsigned int ext:4; unsigned int grouping:8; #else unsigned int grouping:8; unsigned int ext:4; -#define FRU_PICMGEXT_LINK_TYPE_BASE 0x01 +#define FRU_PICMGEXT_LINK_TYPE_BASE 0x01 #define FRU_PICMGEXT_LINK_TYPE_FABRIC_ETHERNET 0x02 #define FRU_PICMGEXT_LINK_TYPE_FABRIC_INFINIBAND 0x03 -#define FRU_PICMGEXT_LINK_TYPE_FABRIC_STAR 0x04 -#define FRU_PICMGEXT_LINK_TYPE_PCIE 0x05 +#define FRU_PICMGEXT_LINK_TYPE_FABRIC_STAR 0x04 +#define FRU_PICMGEXT_LINK_TYPE_PCIE 0x05 +#define FRU_PICMGEXT_LINK_TYPE_FABRIC_ETHERNET_10GBD 0x32 unsigned int type:8; unsigned int desig_port:4; unsigned int desig_if:2; diff --git a/lib/ipmi_fru.c b/lib/ipmi_fru.c index e5396d8..9a6fc6c 100644 --- a/lib/ipmi_fru.c +++ b/lib/ipmi_fru.c @@ -2288,8 +2288,7 @@ static void ipmi_fru_picmg_ext_print(uint8_t * fru_data, int off, int length) printf(" Link Type Extension: 0x%02x - ", d->ext); if (d->type == FRU_PICMGEXT_LINK_TYPE_BASE) { - switch (d->ext) - { + switch (d->ext) { case 0: printf("10/100/1000BASE-T Link (four-pair)\n"); break; @@ -2297,76 +2296,93 @@ static void ipmi_fru_picmg_ext_print(uint8_t * fru_data, int off, int length) printf("ShMC Cross-connect (two-pair)\n"); break; default: - printf("Unknwon\n"); + printf("Unknown\n"); break; } } else if (d->type == FRU_PICMGEXT_LINK_TYPE_FABRIC_ETHERNET) { - switch (d->ext) - { + switch (d->ext) { case 0: - printf("Fixed 1000Base-BX\n"); + printf("1000Base-BX\n"); break; case 1: - printf("Fixed 10GBASE-BX4 [XAUI]\n"); + printf("10GBase-BX4 [XAUI]\n"); break; case 2: printf("FC-PI\n"); break; + case 3: + printf("1000Base-KX\n"); + break; + case 4: + printf("10GBase-KX4\n"); + break; default: - printf("Unknwon\n"); + printf("Unknown\n"); + break; + } + } else if (d->type == FRU_PICMGEXT_LINK_TYPE_FABRIC_ETHERNET_10GBD) { + switch (d->ext) { + case 0: + printf("10GBase-KR\n"); + break; + case 1: + printf("40GBase-KR4\n"); + break; + default: + printf("Unknown\n"); break; } } else if (d->type == FRU_PICMGEXT_LINK_TYPE_FABRIC_INFINIBAND) { - printf("Unknwon\n"); + printf("Unknown\n"); } else if (d->type == FRU_PICMGEXT_LINK_TYPE_FABRIC_STAR) { - printf("Unknwon\n"); + printf("Unknown\n"); } else if (d->type == FRU_PICMGEXT_LINK_TYPE_PCIE) { - printf("Unknwon\n"); + printf("Unknown\n"); } else { - printf("Unknwon\n"); + printf("Unknown\n"); } printf(" Link Type: 0x%02x - ", d->type); - if (d->type == 0 || d->type == 0xff) { - printf("Reserved\n"); - } - else if (d->type >= 0x06 && d->type <= 0xef) { - printf("Reserved\n"); - } - else if (d->type >= 0xf0 && d->type <= 0xfe) { - printf("OEM GUID Definition\n"); - } - else { - switch (d->type) - { - case FRU_PICMGEXT_LINK_TYPE_BASE: - printf("PICMG 3.0 Base Interface 10/100/1000\n"); - break; - case FRU_PICMGEXT_LINK_TYPE_FABRIC_ETHERNET: - printf("PICMG 3.1 Ethernet Fabric Interface\n"); - break; - case FRU_PICMGEXT_LINK_TYPE_FABRIC_INFINIBAND: - printf("PICMG 3.2 Infiniband Fabric Interface\n"); - break; - case FRU_PICMGEXT_LINK_TYPE_FABRIC_STAR: - printf("PICMG 3.3 Star Fabric Interface\n"); - break; - case FRU_PICMGEXT_LINK_TYPE_PCIE: - printf("PICMG 3.4 PCI Express Fabric Interface\n"); - break; - default: + switch (d->type) { + case FRU_PICMGEXT_LINK_TYPE_BASE: + printf("PICMG 3.0 Base Interface 10/100/1000\n"); + break; + case FRU_PICMGEXT_LINK_TYPE_FABRIC_ETHERNET: + printf("PICMG 3.1 Ethernet Fabric Interface\n"); + printf(" Base signaling Link Class\n"); + break; + case FRU_PICMGEXT_LINK_TYPE_FABRIC_INFINIBAND: + printf("PICMG 3.2 Infiniband Fabric Interface\n"); + break; + case FRU_PICMGEXT_LINK_TYPE_FABRIC_STAR: + printf("PICMG 3.3 Star Fabric Interface\n"); + break; + case FRU_PICMGEXT_LINK_TYPE_PCIE: + printf("PICMG 3.4 PCI Express Fabric Interface\n"); + break; + case FRU_PICMGEXT_LINK_TYPE_FABRIC_ETHERNET_10GBD: + printf("PICMG 3.1 Ethernet Fabric Interface\n"); + printf(" 10.3125Gbd signaling Link Class\n"); + break; + default: + if (d->type == 0 || d->type == 0xff) { + printf("Reserved\n"); + } else if (d->type >= 0x06 && d->type <= 0xef) { + printf("Reserved\n"); + } else if (d->type >= 0xf0 && d->type <= 0xfe) { + printf("OEM GUID Definition\n"); + } else { printf("Invalid\n"); - break; - } + } + break; } printf(" Link Designator: \n"); printf(" Port Flag: 0x%02x\n", d->desig_port); printf(" Interface: 0x%02x - ", d->desig_if); - switch (d->desig_if) - { + switch (d->desig_if) { case FRU_PICMGEXT_DESIGN_IF_BASE: printf("Base Interface\n"); break;