From fcf7445bcebdda167a561a54f598b1480b1bfabd Mon Sep 17 00:00:00 2001
From: KC Li <kcl@supermicro.com.tw>
Date: Mon, 25 Jul 2016 11:36:08 +0800
Subject: [PATCH] ID:451 - Modify the memory ecc error display of SEL for new
 supermicro motherboards.

---
 include/ipmitool/ipmi_sel_supermicro.h | 12 ++++++++++
 lib/ipmi_sel.c                         | 33 ++++++++++++++++++++++++++
 2 files changed, 45 insertions(+)

diff --git a/include/ipmitool/ipmi_sel_supermicro.h b/include/ipmitool/ipmi_sel_supermicro.h
index a058a8c..1679bd8 100644
--- a/include/ipmitool/ipmi_sel_supermicro.h
+++ b/include/ipmitool/ipmi_sel_supermicro.h
@@ -34,6 +34,18 @@
 #ifndef IPMI_SEL_SUPERMICRO_H
 # define IPMI_SEL_SUPERMICRO_H
 
+static uint16_t supermicro_x10OBi[] = {
+		0x0923, 0xFFFF
+};
+
+static uint16_t supermicro_x10QRH_X10QBL[] = {
+		0x0872, 0x0853, 0xFFFF
+};
+
+static uint16_t supermicro_brickland[] = {
+		0x0726, 0x083A, 0xFFFF
+};
+
 static uint16_t supermicro_x9dal[] = {
 		0x0635, 0xFFFF
 };
diff --git a/lib/ipmi_sel.c b/lib/ipmi_sel.c
index 953e746..0c07cf4 100644
--- a/lib/ipmi_sel.c
+++ b/lib/ipmi_sel.c
@@ -620,6 +620,24 @@ get_supermicro_evt_desc(struct ipmi_intf *intf, struct sel_event_record *rec)
 					break;
 				}
 			}
+			for (i = 0; supermicro_brickland[i] != 0xFFFF; i++) {
+				if (oem_id == supermicro_brickland[i]) {
+					chipset_type = 3;
+					break;
+				}
+			}
+			for (i = 0; supermicro_x10QRH_X10QBL[i] != 0xFFFF; i++) {
+				if (oem_id == supermicro_x10QRH_X10QBL[i]) {
+					chipset_type = 4;
+					break;
+				}
+			}
+			for (i = 0; supermicro_x10OBi[i] != 0xFFFF; i++) {
+				if (oem_id == supermicro_x10OBi[i]) {
+					chipset_type = 5;
+					break;
+				}
+			}
 			if (chipset_type == 0) {
 				snprintf(desc, SIZE_OF_DESC, "@DIMM%2X(CPU%x)",
 						data2,
@@ -632,6 +650,21 @@ get_supermicro_evt_desc(struct ipmi_intf *intf, struct sel_event_record *rec)
 				snprintf(desc, SIZE_OF_DESC, "@DIMM%c%c(CPU%x)",
 						(data2 >> 4) + 0x40 + (data3 & 0x3) * 3,
 						(data2 & 0xf) + 0x27, (data3 & 0x03) + 1);
+			} else if (chipset_type == 3) {
+				snprintf(desc, SIZE_OF_DESC, "@DIMM%c%d(P%dM%d)",
+						((data2 & 0xf) >> 4) > 4
+						? '@' - 4 + ((data2 & 0xff) >> 4)
+						: '@' + ((data2 & 0xff) >> 4),
+						(data2 & 0xf) - 0x09, (data3 & 0x0f) + 1,
+						(data2 & 0xff) >> 4 > 4 ? 2 : 1);
+			} else if (chipset_type == 4) {
+				snprintf(desc, SIZE_OF_DESC, "@DIMM%c%c(CPU%x)",
+						(data2 >> 4) + 0x40,
+						(data2 & 0xf) + 0x27, (data3 & 0x03) + 1);
+			} else if (chipset_type == 5) {
+				snprintf(desc, SIZE_OF_DESC, "@DIMM%c%c(CPU%x)",
+						(data2 >> 4) + 0x40,
+						(data2 & 0xf) + 0x27, (data3 & 0x07) + 1);
 			} else {
 				/* No description. */
 				desc[0] = '\0';